GSoC/GCI Archive
Google Summer of Code 2013 GNU Radio

GNU Radio FPGA Co-processing with the Xilinx Zynq System-on-Chip

by Jonathon Pendlum for GNU Radio

Many signal processing blocks in GNU Radio exhibit parallelism and can be efficiently mapped to the architecture of a FPGA. However, GNU Radio has been slow to adopt FPGA hardware acceleration, likely due to a lack of suitable hardware and difficulty of HDL design. Recently, FPGA vendor Xilinx released the Zynq, a System-on-Chip (SoC) that tightly couples programmable logic with a dual core Cortex A9 ARM processor. It features low latency, high throughput, and cache-coherent communication between the programmable logic and the ARM processor cores. Due to this feature, the Zynq SoC has gained interest in the GNU Radio community as a viable platform for FPGA hardware co-processing. This project proposes adding a framework to GNU Radio to support FPGA co-processing with Xilinx's Zynq SoC.